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Optical & Environmental Parameters |
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Screen Type |
480x272 pixels - RGB Stripe - Pixel Pitch 0.2x0.2mm |
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Display Area |
95x53mm - 4.3"
diagonal |
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RGB
Colours |
16 million (24 bit) |
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Display Type |
Transmissive |
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Contrast Ratio |
250:1 |
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View Angle (typ) |
60 degrees |
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LED Backlight Illumination |
300 nit |
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Response Time |
25ms @ 25C |
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Default Viewing
Angle |
12 o'clock (6
o'clock-Invert the PCB and set 180 degrees orientation in software) |
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Weight |
101g including touch screen |
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Operating Temperature |
-20C to +70C |
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Storage
Temperature |
-30C to +80C |
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Humidity |
20% to 70% RH |
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Vibration
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10-55-10Hz, all amplitude
1mm, 30Min., X-Y-Z (Non operating) |
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Shock |
392m/s2 (40G)
9mS X-Y-Z, 3 times each direction (Non operating) |
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Electrical Parameters |
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Parameter |
Sym |
Min |
Typ |
Max |
Unit |
Condition |
Note |
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Supply Voltage |
VCC |
4.5 |
5 |
5.5 |
VDC |
VSS=0V |
Absolute Max 6.0VDC |
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Logic Supply Output |
VDD |
3.2 |
3.3 |
3.4 |
VDC |
VCC=5V |
Max50mA |
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Logic Input Voltage |
"H" |
VIH |
-0.5 |
- |
3.4 (1) |
VDC |
VCC=5V |
/RES, K0-K24, SCK, /SS, HB, SIN, SCL,SDA |
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"L" |
VIL |
VSS |
- |
VSS+0.5 |
VDC |
VSS=0V |
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Logic Output Voltage |
"H" |
VOH |
3.0 |
- |
3.4 |
VDC |
IOH=2mA
VCC=5v |
K0-K24, SDA, SCL, SOUT, MB |
|
"L" |
VOL |
0 |
- |
0.7 |
VDC |
IOL=-2mA
VCC=5V |
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"H" Level Logic Input
Current |
IIH |
- |
- |
1.0 |
uADC |
VCC=5.5V |
/RES, K0-K24, SCK, /SS, SIN, SCL, SDA |
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"L" Level Logic Input
Current |
IIL |
- |
- |
1.0 |
uADC |
VCC=5.5V |
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RS232 Input Voltage |
"H" |
VIH |
2 |
- |
15 |
VDC |
VCC=5V |
RXD, CTS, DSR |
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"L" |
VIL |
-15 |
- |
VSS+0.5 |
VDC |
VCC=5V |
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RS232 Output Voltage |
"H" |
VOH |
4 |
7 |
- |
VDC |
3kΩ to GND
VCC=5V
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TXD, DTR, RTS |
|
"L" |
VOL |
- |
-3 |
-2 |
VDC |
3kΩ to GND
VCC=5V |
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Power Supply Current
1 |
ICC1 |
340 |
360 |
390 |
mADC |
VCC=5V |
All dots on |
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Power Supply Current
2 |
ICC2 |
120 |
140 |
170 |
mADC |
VCC=5V |
LED Backlight Off |
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Power Supply Current
3 |
ICC3 |
50 |
60 |
70 |
mADC |
VCC=5V |
Reset LOW |
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Note
(1) The voltage applied to logic signals must not exceed the rising VCC at
power on as this could affect module initialisation
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Connector Pin
Assignment |
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CON |
Function |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
Note |
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CN1 |
RS232 Port |
NC |
DTR |
TXD |
CTS |
RXD |
RTS |
DSR |
NC |
GND |
5V |
Fits 9 way IDC D type pin 1-9 |
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RS232+RS485 |
T+ |
R- |
TXD |
CTS |
RXD |
RTS |
R+ |
T- |
GND |
5V |
Available on -K611xxx |
|
CN2 |
5V In / Piezo / GND |
5V |
/PZ |
0V |
- |
- |
- |
- |
- |
- |
- |
Connect piezo negative |
|
CN3
|
I2C Serial Mode |
5V |
SCL |
- |
SDA |
0V |
/IRQ |
- |
/RES |
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3v3 Logic (5v in option) |
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Asynch Serial Mode |
5V |
- |
SI |
- |
0V |
- |
SO |
/RES |
MB |
HB |
3v3 Logic (5v in option) |
|
Clock Ser / SPI Mode |
5V |
SCK |
/SS |
MOSI |
0V |
MISO |
/IRQ |
/RES |
MB |
HB |
/IRQ flags read request to host |
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User I/O |
5V |
K24 |
K25 |
K26 |
0V |
K27 |
K28 |
/RES |
K29 |
K30 |
Additional I/O |
|
CN4 |
ADC In, PWM Audio |
AN1 |
AN2 |
0V |
5V |
PW1 |
PW2 |
ATX |
ARX |
ACK |
AFS |
AC97 Audio Pins 7-10 |
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User I/O |
K16 |
K17 |
0V |
5V |
K18 |
K19 |
K20 |
K21 |
K22 |
K23 |
Additional I/O |
Note: RTS/CTS or DTR/DSR can be selected, not both. When RS485 fitted in
model K611A1xx then only RTS/CTS are possible.
Half duplex uses connector CN1 pins 1 and 8.
CN2 is the preferred power supply input and other supply connections
used for powering peripherals
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CON |
Function |
1/2 |
3/4 |
5/6 |
7/8 |
9/10 |
11/12 |
13/14 |
15/16 |
17/18 |
19/20 |
Note |
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CN5 |
USB/ SD Card Extension |
DA2 |
CDA |
CK |
DA0 |
0V |
0V |
DM |
CNX |
- |
- |
SD
Card Pins 1-10
USB Pins 11-16 |
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DA3 |
3V3 |
0V |
DA1 |
CD |
5V |
DP |
0V |
- |
- |
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CN6 |
Debug / Async Serial |
3V3 |
DRXD |
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DBG
3V3 output max 50mA |
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0V |
DTXD |
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CN7 |
8x8 Keyboard Matrix and user I/O Ports |
5V |
3V3 |
K0 |
K2 |
K4 |
K6 |
K8 |
K10 |
K12 |
K14 |
3V3 output max 50mA |
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0V |
0V |
K1 |
K3 |
K5 |
K7 |
K9 |
K11 |
K13 |
K15 |
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CN8 |
USB Connector |
5V power is provided from the PC. Standard Mini B
connector can be omitted on user
request. |
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CN9 |
SD Card Slot |
Micro SD Card holder allows permanent
installation for large storage or upload to internal flash. |
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CON |
Function |
1 |
2 |
3 |
4 |
5 |
Note |
|
CN12 |
AS2 |
TxDI (3V3lvl) |
GND |
RxDI (3V3lvl) |
5V in |
- |
AS2 when RS422 not fitted |
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CN13 |
Analoque |
GND |
AD0 |
AD3 |
AD1/AD2 |
AD1/AD2 |
Analoque input when when resistive touch not fitted |
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5V pins are common
un-fused input /outputs. 3V3 pins are outputs only with a total 50mA capacity. Do not
connect pins '-' or NC
Pin
Numbering
 The
square pad always indicates Pin1
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Jumper and
Additional Connector Information |
|
JMP/CON |
Function |
Note |
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BT1 |
Battery Connector |
Apply solder bump to center pad before fitting
holder. CR2032 battery positive up. |
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BATT1 |
RTC alternate power 3VDC |
Apply right angle connector top side soldered. |
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BL |
LED Backlight alternate supply |
When the backlight is software disabled, 30VDC
at 20mA can be applied by the user. |
|
J4 |
RTS Jumper |
Solder 1 and 2 for RTS. |
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J8 |
RS485 Half Duplex Jumper |
Solder 1 and 2 for Full Duplex, Solder 2 and 3
for Half Duplex |
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J15 |
RTS+RS4/DTR Jumper |
Solder 1 and 2 for RTS and RS485 if fitted,
solder 2 and 3 for DTR when RS485 not fitted. |
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J16 |
CTS+RS4/DSR Jumper |
Solder 1 and 2 for CTS and RS485 if fitted,
solder 2 and 3 for DSR when RS485 not fitted. |
|
xWP |
Write protect jumpers |
Solder to prevent data update of non volatile
memory where fitted.N=Nand, EE=EEPROM. |
|
J47 |
5V supply on Pin10 on CN1 |
Solder this jumper to connect the 5V supply to
Pin 10 on CN 1 |
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Note: RTS/CTS or DTR/DSR can be selected, not both. When RS485 fitted in
model K611A1xx then only RTS/CTS are possible.
The top chassis mounting holes are connected to the TFT
frame via J20 as default. Cut to isolate.
The TFT frame is connected to 0V via J19 as default. Cut to isolate. |
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TU480x272C Hardware Changes |
|
PCB |
K612A1 |
K611A1 |
Hardware Changes |
Image |
PCB480272A
Issue
4 |
v3 |
v1 |
1/ Port changes to KBD Conn
for more functionality
2/ J14 (D16-D31 data bus) removed to allow NAND memory to go on top side
3/ Debug port changed from RS232 levels to TTL levels
4/ RS232 handshake lines reduced & RS485 now possible at same time as RS232
5/ Silk screen ident added to rear of PCB |
View |
PCB480272A
Issue
5 |
v4 |
v1 |
1/ Caps added to touch panel
lines
2/ Frame link connection for LCD panel
3/ Backlight controlled from PWM output to allow dimming
4/ External watchdog reset chip added |
View |
PCB480272A
Issue
6 |
v5 |
N/A |
1/ Software version. Control
links added J21
2/ CN 12 added (3w Txdi Rxdi)
3/ Link array J11 added allowing SPI connection to CN3
4/ RS485 signals separated from keyboard connection |
View |
PCB480272A
Issue
8A |
v7 |
v3 |
1/ External watchdog turns 3V3
rail off
2/ Implement noise reduction, routing, caps, layers for improved USB & reduced emissions
3/ Backlight circuit changed from regulated voltage to constant current
4/ Default copper bridges on link options for most common selections
5/ Voltage selections (5V/3V3)
links added for CN3, CN4
6/ Fuse relocated from under LCD
7/ IēC buffers added to rear of PCB - very limited use due to voltage
threshold levels.
8/ USB functionality defaulted by copper link on J21 D |
View |
PCB480272A
Issue
9 |
v8 |
v4 |
1/ IēC buffer changed to
PCA9306 with 5V/3V3 option
2/ RFI noise reduction improvements
3/ USB functionality defaulted by copper link on J21 D |
- |
PCB480272C
Issue
1 |
v9 |
v5 |
1/ Voltage selections links
for CN3, CN4 reversed
2/ Revised PCB layout for new TFT.
3/Touch panel connection not separate anymore
4/ Fuse relocated to top left of board
5/ USB functionality defaulted by copper link on J21 A |
View |
PCB480272C
Issue
2 |
v10 |
N/A |
1/ Voltage selections links
for CN3, CN4 reversed to be same as PCB480272A Issue 8A
2/ Ferrite reset array inline on RS485 lines
3/ New connector added 5W buch panel / analogue inputs if standard touch
panel is not used.
4/ Link options for LCD panels with 20/40mA backlight currents.
5/ USB functionality defaulted by copper link on J21 A |
View |
PCB480272D
Issue 3 |
v12 |
|
PCB Layer order change
1 top
2 gnd
3 pwr
4 sig (least busy)
5 sig (most busy)
6 bottom
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View |
PCB480272D
Issue 5 |
v13 |
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Design changes for better rfi performance
Caps around LCD 1nF 10nF 100nF
Add additional 3 ground pads for lcd screen connection
Caps around 3V3 reg - remove links and replace with caps
Add additional grounds for cpu if possible
Remove defualt link to chassis
cap arrays - group arrays for i2c and async
individual caps for i2c
change to individual caps on backside for ac97 clock
common mode filter at input on underside
RN4 & RN5 on back of module for easy removal
Added 2 caps to bottom side vddana (cpu side of inductor)
Added 3 caps to bottom side vddplla very close to pin
Added extra cap on back close to vddcore pin B10
Added 2 caps on back to vddiom R8 R12
Moved caps etc away from connectors on underside
PCBs to be built with 2 'layer' orders
Normal 123456 (TOP,GND,3V3,LB,MB,BOT)
Alternative ABCDEF (TOP,GND,MB,LB,3V3,BOT) 4 only |
View |
PCB480272D
Issue 5 |
v13.1 |
|
4 wire bond connections between
PCB 0V and TFT frame |
View |
PCB480272D
Issue 6 |
v14 |
|
1/ solder blob link option for CN1 pin 10 (J47) (Vin) - to
prevent noise down line - OK
2/ 'nand enable' link removed as per DL
3/ solder blob link to usb 5V pin (J48) (default to isolate) - OK
4/ chassis ground ring around pcb edge with 5mm stiching - OK
5/ 4 off pins to locate / secure / ground lcd chassis - OK
6/ crossover for txd0 & 1 etc for linux RS485 half duplex operation - OK
Rxd0 defaulted open to prevent contention
7/ CM filter at input and between chassis gnd & 0V - OK
8/ 2 small caps to chassis and overvoltage protection zener directly after
fuse. - OK
9/ remove R21 (usb shield) & replace with solder blob link - OK |
View |
PCB480272D
Issue 6 & 7 |
v15 |
|
Series ferrite beads replaced
with 47R on CN1
Issue 7 boards have
4 off 1mm dia holes for LCD fixing moved 0.5mm outboard in vertical plane
and 1mm inboard in horizontal plane |
View |
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Pin Assignments, Module Dimensions and Function
Syntax Copyright 2010 Noritake Co Limited
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